An embedded system supporting dynamic partial reconfiguration of hardware resources for morphological image processing

Processors for high-performance computing applications are generally designed with a focus on high clock rates, parallelism of operations and high communication bandwidth, often at the expense of large power consumption. However, the emphasis of many embedded systems and untethered devices is on minimal hardware requirements and reduced power consumption. With the incessant growth of computational needs for embedded applications, which contradict chip power and area needs, the burden is put on the hardware designers to come up with designs that optimize power and area requirements. This thesis investigates the efficient design of an embedded system for morphological image processing applications on Xilinx FPGAs (Field Programmable Gate Array) by optimizing both area and power usage while delivering high performance. The design leverages a unique capability of FPGAs called dynamic partial reconfiguration (DPR) which allows changing the hardware configuration of silicon pieces at runtime. DPR allows regions of the FPGA to be reprogrammed with new functionality while applications are still running in the remainder of the device. The main aim of this thesis is to design an embedded system for morphological image processing by accounting for real time and area constraints as compared to a statically configured FPGA. IP (Intellectual Property) cores are synthesized for both static and dynamic time. DPR enables instantiation of more hardware logic over a period of time on an existing device by time-multiplexing the hardware realization of functions. A comparison of power consumption is presented for the statically and dynamically reconfigured designs. Finally, a performance comparison is included for the implementation of the respective algorithms on a hardwired ARM processor as well as on another general-purpose processor. The results prove the viability of DPR for morphological image processing applications

Design and Implementation of ZCS BUCK Converter

Buck converters are step-down DC-DC converters that are widely being used in different electronic devices like laptops,PDA’s,cell phones and also electric vehicles to obtain different level of voltages. These converters are nothing but ,high frequency switching devices operating on PWM principle. The need for more and more lighter and smaller electronic devices propels the need for reduced size of converters operating at higher load currents. With all these inadvertent conditions the switching frequency has jumped from KHz range to MHz range.The switching devices are made to turn on and turn off the entire load current at high di/dt , and also withstand high voltage stress across them.Due to these two effects there occurs increased power losses in these converters and reduces the efficiency significantly. The reduction in efficiency is highly unacceptable as it leads to shorter battery life and derated device conditions. The shortcomings explained above can be minimised and upto some extent eliminated if each switch is made to turn-on and turn-off when the voltage across it and/or current through it is zero at the instant of switching. The converter circuits which employ zero voltage and /or zero current switching are known as Resonant converters. In most of these converters some form of L-C resonance is used, that is why these are known as resonant converters. In this project a detailed study of zero current switching buck converters is done and also practically implemented in hardware. In addition a mathematical analysis of switching loss occuring in MOSFET’s is also presented and a short study of zero voltage switching is also appended. During the hardware implementation the Ton,Toff and operating frequency were found out and thoroughly tuned through the IC555 circuit and various waveforms across inductors,capacitors,load resistor and test points were noted down. These waveforms were found to be in precise proximity of the theoretically observed waveforms